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Signal Processing

S.NO. Project No. Project title Technology Download 1 ICDST-MT05 An Optimal-Distance-Based Transmission Strategy for Lifetime Maximization of Wireless Sensor Networks Signal Processing Download 2 ICDST-MT06 Successive Interference Mitigation in Multiuser MIMO Interference Channels Signal Processing Download 3 ICDST-MT08 Dynamic Channel Assignment for Wireless Sensor  Networks: A Regret Matching Based Approach Signal Processing Download 4 ICDST-MT13 […]

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Digital Image Processing

Branch: Electronics and Communication Topic: MATLAB S.NO. Project No. Project title Technology Download 1 ICDST-MT01 A Novel Approach for Denoising and Enhancement of Extremely Low-light Video Digital Image Processing Download 2 ICDST-MT02 Recognizing Common CT Imaging Signs of Lung Diseases Through a New Feature Selection Method Based on Fisher Criterion and Genetic Optimization Digital Image […]

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VLSI

Branch: Electronics and Communication Topic: VLSI S.no. Project code Project theme Technology Download 1 ICDST-VLSI01 Trigger-Wave Asynchronous Cellular Logic Array for Fast Binary Image Processing VLSI Download 2 ICDST-VLSI02 An Efficient VLSI Architecture of a Reconfigurable Pulse-Shaping FIR Interpolation Filter for Multistandard DUC VLSI Download 3 ICDST-VLSI03 Reliable Low-Power Multiplier Design Using Fixed-Width Replica Redundancy […]

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Core VLSI

Branch: Electronics and Communication Topic: Embedded Systems S.no. Project code Project theme Technology Download 1 TODST-CVLSI01 Aging-Aware Reliable Multiplier Design With Adaptive Hold Logic CORE VLSI Download 2 TODST-CVLSI02 A Modified Partial Product Generator for Redundant Binary Multipliers CORE VLSI Download 3 TODST-CVLSI03 Design & Analysis of 16 bit RISC Processor Using low Power Pipelining […]

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VLSI

Branch: Electronics and Communication Topic: Embedded Systems S.no. Project code Project theme Technology Download 1 TODST-CVLSI01 Aging-Aware Reliable Multiplier Design With Adaptive Hold Logic CORE VLSI Download 2 TODST-CVLSI02 A Modified Partial Product Generator for Redundant Binary Multipliers CORE VLSI Download 3 TODST-CVLSI03 Design & Analysis of 16 bit RISC Processor Using low Power Pipelining […]

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Core VLSI

Branch: Electronics and Communication Topic: VLSI Low Power S.no. Project code Project theme Technology Download 1 TODST-VLSILP01 A Combined SDC-SDF Architecture for Normal I/O Pipelined Radix-2 FFT DSP Download 2 TODST-VLSILP02 A High-Performance FIR Filter Architecture for  Fixed and Reconfigurable Applications DSP Download 3 TODST-VLSILP03 An Efficient VLSI Architecture of a Reconfigurable Pulse-Shaping FIR  for […]

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