VLSI PROJECTS (2019-20)
Core Memories
| S.NO | TITLES | Download |
| DST TO CM 01 | Design of area-efficient and highly reliable rhbd 10t memory cell for aerospace applications | |
| DST TO CM 02 | Column-selection-enabled 10t sram utilizing shared diff-vdd write and dropped-vdd read for power reduction | |
| DST TO CM 03 | Radiation-hardened 14t sram bitcell with speed and power optimized for space application | |
| DST TO CM 04 | Design and characterization of seu hardened circuits for sram-based fpga | |
| DST TO CM 05 | Power efficient and reliable nonvolatile tcam with hi-pfo and semi-complementary driver | |
| DST TO CM 06 | Three-dimensional monolithic finfet-based 8t sram cell design for enhanced read time and low leakage | |
| DST TO CM 07 | A 7t security oriented sram bitcell | |
| DST TO CM 08 | Energy efficient single-ended 6t sram for multimedia applications | |
| DST TO CM 09 | Low-complexity continuous-flow memory-based fft architectures for real-valued signals | |
| DST TO CM 010 | A 12t low-power standard-cell based sram circuit for ultra-low-voltage operations |
