VLSI PROJECTS (2019-20)
Communications and Crypto Core
| S.NO | TITLES | Download |
| DST TO CRYPTO 01 | A Double Error Correction Code For 32-bit Data Words With Efficient Decoding | |
| DST TO CRYPTO 02 | A decoder for short bch codes with high decoding efficiency and low power for emerging memories | |
| DST TO CRYPTO 03 | A Probabilistic Parallel Bit-flipping Decoder For Low-density Parity-check Codes | |
| DST TO CRYPTO 04 | Error Detection And Correction In SRAM Emulated tcams | |
| DST TO CRYPTO 05 | A Solution For Ultra-low Bit-error-rate Interface Of Superconductor-semiconductor By Using An Error-correction-code Encoder | |
| DST TO CRYPTO 06 | An Area-efficient On-chip Memory System For Massive MIMO Using Channel Data Compression | |
| DST TO CRYPTO 07 | Design Of Low-power Non-binary Ldpc Decoder Exploiting Dram Refresh Rate Over-scaling | |
| DST TO CRYPTO 08 | Detection Of Limited Magnitude Errors In Emerging Multilevel Cell Memories By One-bit Parity (obp) Or Two-bit Parity (tbp) | |
| DST TO CRYPTO 09 | Two bit overlap: a class of double error correction one step majority logic decodable codes | |
| DST TO CRYPTO 010 | Efficient Hardware Implementation of 256-bit ECC Processor Over Prime Field | |
| DST TO CRYPTO 011 | Efficient TCAM Design Based on Multipumping-Enabled Multiported SRAM on FPGA | |
| DST TO CRYPTO 012 | Hardware Software Co-simulation of Obfuscated 128-bit AES Algorithm for Image Processing Applications | |
| DST TO CRYPTO 013 | MAES: Modified Advanced Encryption Standard for Resource Constraint Environments |
