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Mechanical Engg

Mechanical Engineering Robotic arm interfacing with PC/MCU/ IR/RF Hydraulic lift Line follower or tracking robot Automated walking robot Digital speed measurement system for automobile Lift control using PC and MCU Escalator lift using PC & MCU Pathfinder mobile robot Multilevel car parking lift using MCU Automatic railway crossing gate controller Auto rejection + conveyer belt […]

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VLSI

Branch: Electronics and Communication Topic: VLSI S.no. Project code Project theme Technology Download 1 ICDST-VLSI01 Trigger-Wave Asynchronous Cellular Logic Array for Fast Binary Image Processing VLSI Download 2 ICDST-VLSI02 An Efficient VLSI Architecture of a Reconfigurable Pulse-Shaping FIR Interpolation Filter for Multistandard DUC VLSI Download 3 ICDST-VLSI03 Reliable Low-Power Multiplier Design Using Fixed-Width Replica Redundancy […]

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Core VLSI

Branch: Electronics and Communication Topic: Embedded Systems S.no. Project code Project theme Technology Download 1 TODST-CVLSI01 Aging-Aware Reliable Multiplier Design With Adaptive Hold Logic CORE VLSI Download 2 TODST-CVLSI02 A Modified Partial Product Generator for Redundant Binary Multipliers CORE VLSI Download 3 TODST-CVLSI03 Design & Analysis of 16 bit RISC Processor Using low Power Pipelining […]

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VLSI

Branch: Electronics and Communication Topic: Embedded Systems S.no. Project code Project theme Technology Download 1 TODST-CVLSI01 Aging-Aware Reliable Multiplier Design With Adaptive Hold Logic CORE VLSI Download 2 TODST-CVLSI02 A Modified Partial Product Generator for Redundant Binary Multipliers CORE VLSI Download 3 TODST-CVLSI03 Design & Analysis of 16 bit RISC Processor Using low Power Pipelining […]

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Core VLSI

Branch: Electronics and Communication Topic: VLSI Low Power S.no. Project code Project theme Technology Download 1 TODST-VLSILP01 A Combined SDC-SDF Architecture for Normal I/O Pipelined Radix-2 FFT DSP Download 2 TODST-VLSILP02 A High-Performance FIR Filter Architecture for  Fixed and Reconfigurable Applications DSP Download 3 TODST-VLSILP03 An Efficient VLSI Architecture of a Reconfigurable Pulse-Shaping FIR  for […]

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