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VLSI low power

Branch: Electronics and Communication

Topic: VLSI Low Power Project code Project theme Technology Download
1 TODST-VLSILP01 A Combined SDC-SDF Architecture for Normal I/O Pipelined Radix-2 FFT DSP Download
2 TODST-VLSILP02 A High-Performance FIR Filter Architecture for  Fixed and Reconfigurable Applications DSP Download
3 TODST-VLSILP03 An Efficient VLSI Architecture of a Reconfigurable Pulse-Shaping FIR  for Multistandard DUCInterpolation Filter DSP Download
4 TODST-VLSILP04 Obfuscating DSP Circuits via High-Level Transformations DSP Download
5 TODST-VLSILP05 Razor Based Programmable Truncated Multiply and Accumulate, Energy-Reduction for Efficient Digital Signal Processing DSP Download
6 TODST-VLSILP06 OptimizedApproach of Sobel Edge Detection Technique Using Xilinx System Generator Image processing Download
7 TODST-VLSILP07 Reconfigurable Architecture of Adaptive Median Filter – An FPGA Based Approach for Impulse Noise Suppression Image processing Download
8 TODST-VLSILP08 High Efficiency VLSI Implementation of an Edge-directed Video Up-scaler Using High Level Synthesis Image processing Download
9 TODST-VLSILP09 GFCG: Glitch Free Combinational Clock Gating Approach in Nanometer VLSI Circuits LOW POWER Download
10 TODST-VLSILP10 Low Power Compressor Based MAC Architecture for DSP Applications LOW POWER Download
11 TODST-VLSILP11 Low Power Multiplier Architectures Using Vedic Mathematics in 45nm Technology for High Speed Computing LOW POWER Download
12 TODST-VLSILP12 Low-Cost Multiple Bit Upset Correction in SRAM-Based FPGA Configuration Frames


LOW POWER Download
13 TODST-VLSILP13 Power Optimization of Communication System Using Clock Gating Technique LOW POWER Download
14 TODST-VLSILP14 Low-Power Programmable PRPG With Test Compression Capabilities LOW POWER Download
15 TODST-VLSILP15 Design and Synthesis of Bandwidth Efficient QPSK Modulator for Low Power VLSI Design LOW POWER Download
16 TODST-VLSILP16 A Sub-mW, Ultra-Low-Voltage, Wideband Low-Noise Amplifier Design Technique LOW POWER Download
17 TODST-VLSILP17 Frequency-Tuning Negative-Conductance Boosted Structure and Applications for Low-Voltage Low-Power Wide-Tuning-Range VCO LOW POWER Download
18 TODST-VLSILP18 TM-RF: Aging-Aware Power-Efficient Register File Design for Modern Microprocessors LOW POWER Download
19 TODST-VLSILP19 A Novel Realization of Reversible LFSR for its Application in Cryptography VLSI Download
20 TODST-VLSILP20 Preemptive Built-In Self-Test for In-Field Structural Testing VLSI Download
21 TODST-VLSILP21 Scan Chain Masking for Diagnosis of Multiple Chain Failures in a Space Compaction Environment VLSI Download
22 TODST-VLSILP22 Scan Test Bandwidth Management for Ultralarge-Scale System-on-Chip Architectures VLSI Download
23 TODST-VLSILP23 Multiplexer based High Throughput S-box for AES Application VLSI Download
24 TODST-VLSILP24 Skewed-Load Test Cubes Based on Functional Broadside Tests for a Low-Power Test Set VLSI Download
25 TODST-VLSILP25 A Method of One-Pass Seed Generation for LFSR-Based Deterministic/Pseudo-Random Testing of Static Faults VLSI Download
26 TODST-VLSILP26 Built-in Self-Calibration and Digital-Trim Technique for 14-Bit SAR ADCs Achieving ±1 LSB INL VLSI Download


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