Branch: Computer Science  Topic: signal processing(2017-18) S.NO. Project No. Project title Technology Download 1 ICDST-MT05 An Optimal-Distance-Based Transmission Strategy for Lifetime Maximization of Wireless Sensor Networks Signal Processing 2 ICDST-MT06 Successive Interference Mitigation in Multiuser MIMO Interference Channels Signal Processing 3 ICDST-MT08 Dynamic Channel Assignment for Wireless Sensor  Networks: A Regret Matching Based Approach Signal […]

Branch: Electronics and Communication Topic: Digital Image Processing   S.NO. Project No. Project title Technology Download 1 ICDST-MT01 A Novel Approach for Denoising and Enhancement of Extremely Low-light Video Digital Image Processing 2 ICDST-MT02 Recognizing Common CT Imaging Signs of Lung Diseases Through a New Feature Selection Method Based on Fisher Criterion and Genetic Optimization […]

Branch: ELECTRONICS  Topic: VLSI (2018-19)   Sno. TOPIC TECH., DST TO C 01 An Analog LO Harmonic Suppression Technique for SDR Receivers VHDL DST TO C 02 Feedforward-Cutset-Free Pipelined Multiply-Accumulate Unit for the Machine Learning Accelerator VHDL DST TO C 03 Multiloop control for Fast Transient DC-DC Converter TANNER DST TO C 04 A Decoder […]

  Branch: ELECTRONICS COMMUNICATION Topic: CORE VLSI (2018-19) S.No   TITLES   DOMAIN DOWNLOAD CORE VLSI   DST TO C 01 Approximate Quaternary Addition with the Fast Carry Chains of FPGAs CORE VLSI   DST TO C 02 A Low-Power Configurable Adder for Approximate Applications CORE VLSI   DST TO C 03 A Low-Power High-Speed Accuracy-Controllable […]

Branch: Electronics and Communication Topic: Embedded Systems   S.no. Project code Project theme Technology Download 1 TODST-CVLSI01 Aging-Aware Reliable Multiplier Design With Adaptive Hold Logic CORE VLSI 2 TODST-CVLSI02 A Modified Partial Product Generator for Redundant Binary Multipliers CORE VLSI 3 TODST-CVLSI03 Design & Analysis of 16 bit RISC Processor Using low Power Pipelining CORE […]

Branch: Electronics and Communication Topic: VLSI Low Power S.no. Project code Project theme Technology Download 1 TODST-VLSILP01 A Combined SDC-SDF Architecture for Normal I/O Pipelined Radix-2 FFT DSP 2 TODST-VLSILP02 A High-Performance FIR Filter Architecture for  Fixed and Reconfigurable Applications DSP 3 TODST-VLSILP03 An Efficient VLSI Architecture of a Reconfigurable Pulse-Shaping FIR  for Multistandard DUCInterpolation […]