Contact Us:09993897203
Email: dstarenainfo@gmail.com
1st Branch: 121,Malviya Nagar,
New Market,Bhopal-462003
2nd Branch:146/7/2 Premium Center
Zone-1,MP Nagar
Bhopal-462011
Arrow Registration
MATLAB,PHP,VHDL(VLSI),EMBEDDED SYSTEM,ANDROID WEBSITE DESIGN Industrial Training will be start Soon

COMMUNICATIONS

VLSI PROJECTS (2019-20)

Communications

S.NO TITLES Download
DST TO COMM 01 A double error correction code for 32-bit data words with efficient decoding
DST TO COMM 02 A probabilistic parallel bit-flipping decoder for low-density parity-check codes
DST TO COMM 03 Error detection and correction in sram emulated tcams
DST TO COMM 04 Efficient hardware implementation of 256-bit ecc processor over prime field
DST TO COMM 05 A new logic for implementation of digital error correction block
DST TO COMM 06 Low power karnaugh map approximate adder for error compensation in loop accumulations
DST TO COMM 07 Sensor-based approximate adder design for accelerating error-tolerant and deep-learning applications
DST TO COMM 08 Hardware software co-simulation of obfuscated 128-bit aes algorithm for image processing applications

 




    Login Page

    Inquiry Form