VLSI 21-22
- Design of Low Power and Enhance Speed Multiplier and Accumulator With SPST Adder in Verilog
- Design of Hamming Type Code using FPGA in Verilog
- Gabor Type Filter for Biometric Recognition with Verilog HDL
- Enhanced Speed and Minimum Complexity Design of a Reed Solomon Type Decoder
- Design and Implementing Vending Machine in Verilog HDL
- Design QPSK And Synthesizing Its Result
- Implementation of Bus Based Bridge for Connecting AHB and OCP Bus